Tomohiro Imanaga, Koji Nakano, Ryota Yasudo, Yasuaki Ito, Yuya Kawamata, Ryota Katsuki, Yusuke Tabata, Takashi Yazane, Kenichiro Hamano, Simple iterative trial search for the maximum independent set problem optimized for the GPUs, Concurrency and Computation: Practice and Experience, to appear. (DOI)
Hiroshi Kagawa, Yasuaki Ito, Koji Nakano, Ryota Yasudo, Yuya Kawamata, Ryota Katsuki, Yusuke Tabata, Takashi Yazane, Kenichiro Hamano, High-throughput FPGA Implementation for Quadratic Unconstrained Binary Optimization, Concurrency and Computation: Practice and Experience, to appear. (DOI)
Naoki Matsumura, Yasuaki Ito, Koji Nakano, Akihiko Kasagi, Tsuguchika Tabaru, A novel structured sparse fully connected layer in convolutional neural networks, Concurrency and Computation: Practice and Experience, to appear. (DOI)
Daisuke Takafuji, Koji Nakano, Yasuaki Ito, Efficient parallel implementations to compute the diameter of a graph, Concurrency and Computation: Practice and Experience, to appear. (DOI)
Naoki Matsumura, Hiroki Tokura, Yuki Kuroda, Yasuaki Ito, Koji Nakano, Tile art image generation using parallel greedy algorithm on the GPU and its approximation with machine learning, Concurrency and Computation: Practice and Experience, Vol. 33, No. 12, e5623, June 2021. (DOI)
Takuma Wada, Naoki Matsumura, Ryota Yasudo, Koji Nakano, Yasuaki Ito, Efficient implementations of Bloom filter using block RAMs and DSP slices on the FPGA, Concurrency and Computation: Practice and Experience, Vol. 33, No. 12, e5475, June 2021. (DOI)
Lucas Saad Nogueira Nunes, Jacir Luiz Bordim, Yasuaki Ito, and Koji Nakano, A Rabin-Karp Implementation for Handling Multiple Pattern-Matching on the GPU, IEICE Transactions on Information and Systems, Vol. E103-D, No, 12, pp. 2412--2420, December 2020. (DOI)
Shunsuke Suita, Takahiro Nishimura, Hiroki Tokura, Koji Nakano, Yasuaki Ito, Akihiko Kasagi, Tsuguchika Tabaru, Efficient Convolution-Pooling on the GPU, Journal of Parallel and Distributed Computing, Vol. 138, pp. 222-229, April 2020. (DOI)
Takahiro Nishimura, Jacir L. Bordim, Yasuaki Ito, Koji Nakano, Accelerating the Smith-Waterman Algorithm Using the Bitwise Parallel Bulk Computation Technique on the GPU, IEICE Transactions on Information and Systems, Vol. E102-D, No. 12, pp. 2400--2408, December 2019. (DOI)
Kohei Yamashita, Yasuaki Ito, Koji Nakano, Bulk execution of the dynamic programming for the optimal polygon triangulation problem on the GPU, Concurrency and Computation: Practice and Experience, Vol. 31, No. 19, e4947, September, 2019. (DOI)
Hiroki Tokura, Toru Fujita, Koji Nakano, Yasuaki Ito, and Jacir L. Bordim, Almost optimal column-wise prefix-sum computation on the GPU, The Journal of Supercomputing, Vol. 74, No. 4, pp. 1510--1521, April 2018. (DOI)
Toru Fujita, Koji Nakano, Yasuaki Ito, and Daisuke Takafuji, An Efficient GPU Implementation of CKY Parsing using the Bitwise Parallel Bulk Computation Technique, IEICE Transactions on Information and Systems, Vol. E100-D, No, 12, pp. 2857--2865, December 2017. (DOI)
Shunji Funasaka, Koji Nakano, and Yasuaki Ito, Adaptive loss-less data compression method optimized for GPU decompression, Concurrency and Computation: Practice and Experience, Vol. 29, No. 24, e4283, November, 2017. (DOI)
Daisuke Takafuji, Koji Nakano, Yasuaki Ito, and Jacir Bordim, C2CU: a CUDA C program generator for bulk execution of a sequential algorithm, Concurrency and Computation: Practice and Experience, Vol. 29, No. 17, e4022, September 2017. (DOI)
Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota and Masami Saeki, An Efficient GPU Implementation of Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices, International Journal of Networking and Computing, Vol. 7, No. 2, pp. 227--247, July 2017. (DOI)
Takumi Honda, Yasuaki Ito, and Koji Nakano, GPU-accelerated Exhaustive Verification of the Collatz Conjecture, International Journal of Networking and Computing, Vol. 7, No. 1, pp. 69--85, January 2017. (DOI)
Hiroaki Koge, Takumi Honda, Toru Fujita, Yasuaki Ito, Koji Nakano, and Jacir L. Bordim, Accelerating digital halftoning using the local exhaustive search on the GPU, Concurrency and Computation: Practice and Experience, Vol. 29, No. 2, e3781, January 2017. (DOI)
Toru Fujita, Koji Nakano, and Yasuaki Ito, Fast Simulation of Conway's Game of Life using Bitwise Parallel Bulk Computation on a GPU, International Journal of Foundations of Computer Science, Vol. 27, No. 08, pp. 981--1003, December 2016. (DOI)
Shunji Funasaka, Koji Nakano, and Yasuaki Ito, Fully Parallelized LZW decompression for CUDA-enabled GPUs, IEICE Transactions on Information and Systems, Vol. E99-D, No. 12, pp. 2986--2994, December 2016. (DOI)
Lucas Saad Nogueira Numes, Jacir Luiz Bordim, Koji Nakano, and Yasuaki Ito, A Memory-access-efficient Implementation for Computing the Approximate String Matching Algorithm on GPUs, IEICE Transactions on Information and Systems, Vol. E99-D, No. 12, pp. 2995--3003, December 2016. (DOI)
Tatsuya Kawamoto, Xin Zhou, Jacir L. Bordim, Yasuaki Ito, and Koji Nakano, An FPGA implementation for a flexible-length-arithmetic processor employing the FDFM processor core approach, IEICE Transactions on Information and Systems, Vol. E99-D, No. 12, pp. 2901--2910, December 2016. (DOI)
Takumi Honda, Yasuaki Ito, and Koji Nakano, GPU-accelerated Bulk Execution of Multiple-length Multiplication with Warp-synchronous Programming Technique, IEICE Transactions on Information and Systems, Vol. E99-D, No. 12, pp. 3004--3012, December 2016. (DOI)
Xin Zhou, Koji Nakano, Yasuaki Ito, Efficient Implementation of FDFM Approach for Euclidean Algorithms on the FPGA, International Journal of Networking and Computing, Vol. 6, No. 2, pp. 420--435, July 2016.(DOI)
Yuji Takeuchi, Koji Nakano, Daisuke Takafuji, and Yasuaki Ito, A character art generator using the local exhaustive search, with GPU acceleration, International Journal of Parallel, Emergent and Distributed Systems, Vol. 31, No. 1, pp. 47--63, January 2016. (DOI)
Toru Fujita, Koji Nakano, and Yasuaki Ito, Bulk execution of Euclidean algorithms on the CUDA-enabled GPU, International Journal of Networking and Computing, Vol. 6, No. 1, pp. 42--63, January 2016. (DOI)
Duhu Man, Koji Nakano, Yasuaki Ito, An Optimal Implementation of the Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation on the GPU, IEICE Transactions on Information and Systems, Vol. E97-D, No.12, pp.3063--3071, December 2014.(DOI)
Akihiko Kasagi, Koji Nakano, and Yasuaki Ito, Offline Permutation on the CUDA-enabled GPU, IEICE Transactions on Information and Systems, Vol. E97-D, No.12, pp. 3052--3062, December 2014.(DOI)
Akihiro Uchida, Yasuaki Ito and Koji Nakano, Accelerating ant colony optimisation for the travelling salesman problem on the GPU, International Journal of Parallel, Emergent and Distributed Systems, Vol. 29, No. 4, pp. 401--420, 2014. (DOI)
Xin Zhou, Norihiro Tomagou, Yasuaki Ito, and Koji Nakano, Implementations of the Hough Transform on the Embedded Multicore Processors, International Journal of Networking and Computing, Vol. 4, No. 1, pp. 174--188, January 2014. (DOI)
Yasuaki Ito and Koji Nakano, A GPU Implementation of Dynamic Programming for the Optimal Polygon Triangulation, IEICE Transactions on Information and Systems, Vol. E96-D, No. 12, pp. 2596--2603, December 2013. (DOI)
Akihiko Kasagi, Koji Nakano, and Yasuaki Ito, Offline Permutation Algorithms on the Discrete Memory Machine with Performance Evaluation on the GPU, IEICE Transactions on Information and Systems, Vol. E96-D, No. 12, pp. 2617--2625, December 2013. (DOI)
Duhu Man, Kenji Uda, Yasuaki Ito and Koji Nakano, Accelerating computation of Euclidean distance map using the GPU with Efficient memory access, International Journal of Parallel, Emergent and Distributed Systems, Vol. 28, No. 5, pp. 383--406, 2013. (DOI)
Yuki Ago, Yasuaki Ito, Koji Nakano, An FPGA implementation for neural networks with the FDFM processor core approach, International Journal of Parallel, Emergent and Distributed Systems, Vol. 28, No. 4, pp. 308-320, 2013. (DOI)
Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito, A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles, International Journal of Networking and Computing (DOI, Vol. 2, No. 1, pp. 269--290, July 2012.
Md. Nazrul Islam Mondal, Koji Nakano and Yasuaki Ito, An Algorithm to Obtain Circuits with Synchronous RAMs, Journal of Communication and Computer, Vol. 9, No. 5, pp. 547-559, May 2012.
Yasuaki Ito, Koji Nakano and Song Bo, The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption, International Journal of Networking and Computing (DOI, Vol. 2, No. 1, pp. 79--96, January 2012.
Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito, A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones, IEICE Transactions on Information and Systems, Vol. E94-D, No. 12, pp.2378--2388, December 2011. (DOI)
Duhu Man, Yasuaki Ito, Koji Nakano, An Efficient Parallel Sorting Compatible with the Standard qsort, International Journal on Foundations of Computer Science, Vol. 22, No. 5, pp. 1057--1071, August 2011. (DOI)
Duhu Man, Kenji Uda, Hironobu Ueyama, Yasuaki Ito and Koji Nakano, Implementations of a Parallel Algorithm for Computing Euclidean Distance Map in Multicore Processors and GPUs, International Journal of Networking and Computing (DOI, Vol. 1, No. 2, pp. 260--276, July 2011.
Song Bo, Kensuke Kawakami, Koji Nakano and Yasuaki Ito, An RSA Encryption Hardware Algorithm using a Single DSP Block and a Single Block RAM on the FPGA, International Journal of Networking and Computing, Vol. 1, No. 2, pp. 277--289, July 2011. (DOI)
Yasuaki Ito, Koji Nakano, Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs, International Journal of Networking and Computing (DOI, Vol. 1, No. 1, pp.49--62, January 2011.
Yasuaki Ito, Koji Nakano, Low-Latency Connected Component Labeling Using an FPGA, International Journal on Foundations of Computer Science, Vol. 21, No.3, pp.405--426, June 2010. (DOI)
Yasuaki Ito, Koji Nakano, A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Acceleration, International Journal on Foundations of Computer Science, Vol. 19, No. 6, pp. 1373--1386, December 2008. (DOI)
Yasuaki Ito, Koji Nakano, Youhei Yamagishi, Efficient Hardware Algorithms for N Choose K Counters Using the Bitonic Merger, International Journal on Foundations of Computer Science, Vol. 18, No.3, pp.517--528, June, 2007. (DOI)
Jacir L. Bordim, Yasuaki Ito, Koji Nakano, An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver, IEICE Trans. on Fundamentals, Vol. E89-A, No.5 pp. 1355--1361, May 2006. (DOI)
Yasuaki Ito and Koji Nakano, FM Screening by the Local Exhaustive Search with Hardware Acceleration, International Journal of Foundations of Computer Science, Vol. 16, No.1, pp.89--104, February 2005. (DOI)
Jacir L Bordim, Oscar H. Ibarra, Yasuaki Ito, and Koji Nakano, Instance-Specific Solutions to Accelerate the CKY Parsing for Large Context-free Grammars, International Journal on Foundations of Computer Science, Vol 15, No.2, pp.403--416, April 2004. (DOI)
Jacir L Bordim, Yasuaki Ito, Koji Nakano, Accelerating the CKY parsing using FPGAs, IEICE Transactions on Information and Systems, Vol. E86-D, No.5, pp.803--810, May 2003.